Research Programme in Assuring Hardware Security by Design in Systems on Chip

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Videos


Publications

1 On Side Channel Vulnerabilities of Bit Permutations in Cryptographic Algorithms, IEEE Transactions on Information Forensics and Security ( Volume: 15 ) 
2 A Secure Data-Toggling SRAM for Confidential Data Protection, IEEE Trans. on Circuits and Systems I - Regular Papers
3 S. Taneja, M. Alioto, "Run-Time PUF Adaptation for Resilient and Energy-Efficient Key Generation via Sensor Fusion and Machine Learning," JSSC
4 Batina, Lejla, Shivam Bhasin, Dirmanto Jap, and Stjepan Picek. "Poster: Recovering the Input of Neural Networks via Single Shot Side-channel Attacks." In Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, pp. 2657-2659. 2019
5 Bhasin, Shivam, Jakub Breier, Xiaolu Hou, Dirmanto Jap, Romain Poussier, and Siang Meng Sim. "SITM: See-In-The-Middle Side-Channel Assisted Middle Round Differential Cryptanalysis on SPN Block Ciphers." IACR Transactions on Cryptographic Hardware and Embedded Systems (2020): 95-122
6 Breier, Jakub, Dirmanto Jap, Xiaolu Hou, and Shivam Bhasin. "On Side Channel Vulnerabilities of Bit Permutations in Cryptographic Algorithms." IEEE Transactions on Information Forensics and Security (2019)
7 M. Alioto, “Trends in Hardware Security: from Basics to ASICs," IEEE Solid-State Circuits Magazine (invited), vol. 11, no. 3, Aug. 2019
8 A High Throughput and Secure Authentication-Encryption AES-CCM Algorithm on Asynchronous Multicore Processor, IEEE Trans. on Information Forensic & Security, IEEE Trans. on Information Forensic & Security


Presentations

1 TCAS-I paper presentation – Secured memory for data protection, ISCAS 2020, Seville, Spain, 17-20 May 2020
2 S. Taneja, M. Alioto, “Deep Sub-pJ/bit Low-Area Energy-Security Scalable SIMON Crypto-Core,” IEEE ISCAS 2020, Seville (Spain), May 2020
3 S. Taneja, M. Alioto, "Fully-Synthesizable All-Digital Unified Dynamic Entropy Generation, Extraction and Utilization in a Cryptographic Core for Constrained Secure Systems," VLSI Symposium 2020
4 Post-Quantum Secure Boot, Design, Automation and Test in Europe Conference (DATE)
5 Practical Reverse Engineering of Secret Sboxes by Side-Channel Analysis, 2020 IEEE International Symposium on Circuits and Systems (ISCAS)
6 Vinay BY.K, Naina Gupta, Anupam Chattopadhyay, Michael Kasper, Christoph Krauss and Ruben Niederhagen: “Post-Quantum Secure Boot”, Design, Automation and Test in Europe Conference, Grenoble, 2020
7 Vinay BY.K, Suman D, Rupesh K, Mustafa K, Anupam Chattopadhyay, Avi Mendelson: “Recruiting Fault Tolerance Techniques for Microprocessor Security”, 28th IEEE Asian Test Symposium (ATS), Kolkata, 2019
8 Side-Channel-Attack-resistant AES accelerator, AsianHost conference, Xi’an, China, 16-17 Dec 2019
9 Tutorial Talk on "How to Build a Secure System-on-the-Chip Architecture" at the 9th International Conference on Security, Privacy and Applied Cryptographic Engineering (SPACE), Gandhinagar, 2019
10 Recovering the Input of Neural Networks via Single Shot Side-channel Attacks, Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security
 11 Recruiting Fault Tolerance Techniques for Microprocessor Security, 28th IEEE Asian Test Symposium (ATS)
 12 Workshop Talk on "Building blocks of a Secure SoC", at the First Workshop on Micro-Architectural Security (MAST) 2019, IIT Madras, Oct 11-12 2019
 13 Presentation at Govware IHL Exhibition in the Singapore International Cyber week 2019, Oct 1-3, 2019
 14 "Reconfigurable Routing Paths As Noise Generators Using NoC Platform for Hardware Security Applications" by Weng-Geng Ho, Ali Akbar Pammu, Kyaw Zwa Lwin Ne and Kwen Siong Chong, Bah Hwee Gwee, in IEEE International System-On-Chip Conference, SOCC’2019, 3-6 Sep 2019
 15 Low Gate-Count Ultra-Small Area Nano Advanced Encryption Standard (AES) Design, IEEE International Symposium on Circuits and Systems (ISCAS)
 16 Invited paper at CICC 2019: M. Alioto, S. Taneja, “Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems,” in Proc. of IEEE CICC 2019 (invited), Austin (USA), April 2019
 17 Technologies for built-in hardware security – short course at EDTM 2019, Marina Bay Sands (Singapore), March 12, 2019
 18 Security in the Post-Quantum Era: Threats and Countermeasures -  Beyond Post-Quantum Security, Design, Automation and Test in Europe Conference (DATE)
 19 Hardware security – from Basics to ASICs – tutorial at ISSCC 2019, San Francisco (USA), Feb 17, 2019 

Demos and public materials

Talks

1 Ubiquitous Always-On Hardware Security: Trends, Perspectives and Directions – keynote speech at the COSADE 2020 workshop, April 3, 2020, Lugano (Switzerland)
2 Towards Pervasive Hardware Security – Across and Within Silicon Chips – keynote speech at the IEEE AsianHOST conference, Dec 16-17, 2019, Xi’an (China)
3 Ubiquitous Always-On Hardware Security: Trends, Perspectives and Directions - keynote speech at the IEEE IVSW 2019 conference, July 2, 2019 Rhodes (Greece)
4 Can Secure architecture perform? - Talk at Campus of the Universitat Politècnica de Catalunya (Spain)
5 Hardware Security in Energy-Constrained Silicon Chips: from Principles to State of the Art – tutorial at IEEE ISCAS, May 19, 2019, Sapporo (Japan)
6 Hardware security – from Basics to ASICs – tutorial at ISSCC 2019, San Francisco (USA), Feb 17, 2019
7 Technologies for built-in hardware security – short course at EDTM 2019, March 12, 2019, Marina Bay Sands (Singapore)
8 Recruiting Fault Tolerance Techniques for Microprocessor Security
9 Post-Quantum Secure Boot
10 Building Blocks of a Secure SoC
11 SoCure Project - 9th International Conference on Security, Privacy and Applied Cryptographic Engineering
12 SoCure Project - Week of Open Source Hardware (WOSH), Zurich, Switzerland