Research

Energy-centric circuit/system design and green ICs

Selected technical achievements and worldwide records

2023: Bluetooth backscattered transmitter with record-low peak power of 10.6 µW and long 97-m range for battery-less green systems
2023: 12-bit SAR ADC with best-in-class 0.43 fJ/conv-step among any ADC above 10 bits based on with offset injection assist
2023: on-chip computer vision architecture with content-agnostic novelty detection reducing neural network activity and power by >100X
2023: first demonstration of analog circuits with transistors operating in the super-cutoff region with only pW/stage power, and moonlight-powered battery-less wake-up receiver with 78-pW power
2023: temperature-to-digital converter and voltage reference with lowest power reported to date (38.4-pW) and able to operate under a 0.6-1.6-V unregulated supply for battery-less systems
2023: first counteraction of side-channel neural network reverse engineering able to operate under voltage scaling via machine learning compensation and multi-level shuffling
2023: self-referenced design-agnostic Laser Voltage Probing attack detection circuit with 100% area coverage and lowest (58%) area overhead for automated design
2023: first ECC-Less multi-level SRAM Physically Unclonable Function and >100% PUF-to-Memory Capacity Ratio with No Bitcell Modification
2023: image sensor with lowest power of 55 pW/pixel reported to date while also including the ability to detect novel frames and regions of interest for further system-level power reductions

2022: image sensor with lowest power of 55 pW/pixel reported to date
2022: first temperature-to-digital converter for purely-harvested operation without any voltage regulation and reference
2022: first on-chip laser voltage probing attack detection method with 100% area coverage at above/below the bandgap wavelength and fully-automated design
2022: image sensor with dynamic LSB for purely-harvested operation at bit depth down to 4 bit and near-zero accuracy degradation in image classification
2022: first broadband impedance monitor up to GHz range to detect probe insertion and side-channel attacks with sub-pad area
2022: CNN accelerator in 40 nm with 228 gate equivalents/MAC unit with energy (28-TOPS/W) and area efficiency (1.5-TOPS/mm2) equivalent to best-in-class accelerators in 5 nm and 7 nm for low-cost AI at the edge
2022: first machine learning-based run-time counteraction of side-channel attacks for post-silicon HW security patching in next-generation secure systems

2021: first sub-100 pJ/pixel Display Stream Compression Encoder for 4K video resolution compression in display ports
2021: first SRAM with in-memory end-to-end computing from DSP signal conditioning to convolutional neural network for true data locality
2021: SRAM buffer for always-on vision systems with energy and area efficiency above the 1,000 TOPS/W and the 100 TOPS/mm2 wall
2021: first battery-Less IoT Sensor Node with WiFi communications in a µW peak power envelope
2021: first tactile event decoder for e-skin supporting human-like tactile sensing density, thanks to 1.6 fJ/convstep energy 0.0075mm2 area per receptor
2021: first SRAM with in-memory unified static and dynamic secret cryptographic key generation for ubiquitous security, and multi-bit SRAM physically unclonable function
2021: first operational amplifier and capacitive sensor interface operating down to 0.25-0.3 V and nW power for continuous operation when solely powered by a millimeter-sized solar cell

2020: first IoT sensor node operating uninterruptedly when solely powered by moonlight (3.1 nW) for a battery-free world, while being able to scale up its speed by five orders of magnitude
2020: first voltage reference with pW-range power and 0.25-V minimum voltage for battery-less green integrated systems
2020: first voltage- and current-input ADC architectures designed with digital standard cell for ultra-low design effort (“ADC in a day”) and minimum area reported to date (3,000-5,000 um2, 4.5X smaller than the smallest)
2020: first microprocessor with reconfigurable microarchitecture for energy-performance scaling wider than voltage scaling

2019: first energy-quality scalable Network on Chip with best-in-class energy (down to 6.9fJ/bit), while still being using conventional low-swing transmitter/receiver circuits
2019: first system architecture for widely adaptive and power-scalable MCU/PMU from sub-mW to nW
2019: first Physically Unclonable Function with design margin and testing time elimination via in-situ and PVT sensor fusion for low-cost hardware security (featured as technological highlight in TSMC 2020 annual report)
2019: first DAC architecture able to be designed with a fully automated digital design flow, and exhibiting graceful degradation under voltage/frequency overscaling

2018: first pW-range wake-up oscillator for IoT sensor nodes able to operate from 0.3V to 1.8V, avoidings the traditional need of additional power-hungry voltage regulation
2018: first battery-indifferent microcontroller able to operate at minimum-power mode (sub-nW), or minimum-energy mode (aligned with best-in-class low-energy processors)
2018: demonstration of reconfigurable microarchitectures down to pipestage granularity, for energy optimization under wide voltage scaling (from 1.2V down to 0.3V)

2017: first reconfigurable clock network for wide voltage scaling (0.3-1.2V). Skew reduction (up to 3.5X) reduces Vmin by 110mV and energy by 1.4X in 40nm. Area overhead is only 1.8%
2017: first sub-mW accelerator for feature extraction in computer vision for IoT down to 55uW (19-49X lower power than previous state of the art)
2017: first fully-synthesizable Physically Unclonable Function for hardware security
2017: first pencil-and-paper variability-aware design methodology for design margin evaluation

2015: most stable and highest-statistical quality Physically Unclonable Function with lowest energy for hardware-level security (10-15X better than previous state of the art)
2015: AES cryptographic core with lowest energy (7X better than previous state of the art)
2015: SRAM senseamp with smallest offset at iso-area (2-3X better than previous state of the art)
2014: SRAM memory first with scalable energy-quality tradeoff for ultra-low energy operation

2013: power gating and ESD circuits with lowest leakage down to tens of pWs (10-100X better than previous state of the art)
2013: smallest ADC Analog-to-Digital converter with widely scalable energy/resolution/voltage (100X lower area than previous state of the art)

2012: first reconfigurable DC-DC converter for reduction of active-sleep-active transition energy (3X lower than previous state of the art)
2012: first ultra-low power mm-sized active RFID for perpetual operation (3 uW)
2012: fastest/most energy-efficient pulsed latch (2.3X better than state of the art)

Some of the applications being explored

machine intelligence (e.g., deep learning) and methods to embed inference and learning on a single chip, using an amalgamation of algorithm, circuit and low power techniques
energy-quality scalable integrated circuit and system design
ubiquitous and nearly-perpetual vision on a chip- hardware security down to physical- ubiquitous human behavior and situational/context awareness via on-chip learning from vision and audio (e.g., crowd monitoring, congestion prediction, occupancy monitoring for thermal/acoustic/visual comfort assurance, ubiquitous surveillance, object detection)
on-chip intelligence for locally-small globally-big data (machine learning accelerators, in-memory computing)
radiofrequency circuits in the uW and sub-uW power range via backscattering
analog circuits with transistors operating in the super-cutoff region
physical hardware security through on-chip sensing, intelligence and actuation
supersensors with architectural support for mutual calibration, and self-calibrating wireless sensors in massive training class for ultra-low testing cost
audio and speech monitors
integrated systems for unconventional interaction with mobile devices
extremely miniaturized integrated circuits for distributed surveillance
µW-power radios for short and mid communication range